標題: | Low Temperature (< 180 degrees C) Wafer-level and Chip-level In-to-Cu and Cu-to-Cu Bonding for 3D Integration |
作者: | Chien, Yu-San Huang, Yan-Pin Tzeng, Ruoh-Ning Shy, Ming-Shaw Lin, Teu-Hua Chen, Kou-Hua Chuang, Ching-Te Hwang, Wei Chiou, Jin-Chern Chiu, Chi-Tsung Tong, Ho-Ming Chen, Kuan-Neng 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2013 |
摘要: | Two bonded structures, Cu/In bonding and Cu-Cu bonding with Ti passivation, were investigated for the application of 3D interconnects. For Cu/In bonding, the bonds were achieved at 170 degrees C due to the isothermal solidification. The intermetallic compounds formed in the joint was Cu2In phase. For another case, Cu-Cu bonding with Ti passivation was successfully achieved at 180 degrees C. Application of Ti passivation can protect inner Cu from oxidation; therefore, the required bonding temperature can be decreased. Compared to direct Cu-Cu bonding, Cu/In bonding and Cu-Cu bonding with Ti passivation can be performed at low temperature, which can meet low thermal budget requirement for most devices. Besides, with the good electrical performance and reliability, these two bonded interconnects can be applied for 3D IC interconnects. |
URI: | http://hdl.handle.net/11536/24162 |
ISBN: | 978-1-4799-0233-0 |
期刊: | 2013 IEEE 63RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) |
起始頁: | 1146 |
結束頁: | 1152 |
顯示於類別: | 會議論文 |