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dc.contributor.authorTu, CHen_US
dc.contributor.authorChang, TCen_US
dc.contributor.authorLiu, PTen_US
dc.contributor.authorZan, HWen_US
dc.contributor.authorTai, YHen_US
dc.contributor.authorFeng, LWen_US
dc.contributor.authorWu, YCen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:36:04Z-
dc.date.available2014-12-08T15:36:04Z-
dc.date.issued2005en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/24403-
dc.identifier.urihttp://dx.doi.org/10.1149/1.1945372en_US
dc.description.abstractPolycrystalline silicon thin-film transistors (poly-Si TFTs) with self-aligned fluorine-doped SiO2 (FSG) spacer were investigated in this study. The presence of FSG spacers can effectively reduce the lateral electrical field near the drain side of a poly-Si TFT device, and strongly passivate Si dangling bonds at the grain boundaries. The significant enhancement in electrical performance suppresses serious kink effect and improves electrical reliability of poly-Si TFTs effectively. In addition, the proposed poly-TFT structure is uncomplicated and compatible with existing TFT manufacturing processes. (c) 2005 The Electrochemical Society.en_US
dc.language.isoen_USen_US
dc.titleImprovement of reliability for polycrystalline thin-film transistors using self-aligned fluorinated silica glass spacersen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.1945372en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume8en_US
dc.citation.issue8en_US
dc.citation.spageG209en_US
dc.citation.epageG211en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000230931300027-
dc.citation.woscount2-
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