Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chi-Lang Nguyen | en_US |
dc.contributor.author | Nguyen Hong Quan | en_US |
dc.contributor.author | Binh-Tinh Tran | en_US |
dc.contributor.author | Su, Yung-Hsuan | en_US |
dc.contributor.author | Tang, Shih-Hsuan | en_US |
dc.contributor.author | Luo, Guang-Li | en_US |
dc.contributor.author | Chang, Edward-Yi | en_US |
dc.date.accessioned | 2014-12-08T15:36:33Z | - |
dc.date.available | 2014-12-08T15:36:33Z | - |
dc.date.issued | 2014-07-01 | en_US |
dc.identifier.issn | 1738-8090 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1007/s13391-014-4016-7 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/24894 | - |
dc.description.abstract | High crystal quality, smooth surface and fully relaxed Ge1-xSix (0.05 <= x <= 0.1) buffers are grown on 6 degrees-off (100) Si substrate by UHV-CVD. A low-temperature (LT) Ge seed layer is used to improve the quality of the Ge1-xSix buffers. In this study, the LT-Ge seed layer is deposited directly onto the Si substrate at a low temperature of 315 degrees C. After that, stress-free Si0.1Ge0.9 and Si0.05Ge0.95 layers are grown, respectively. An in-situ annealing process is also performed for the Si0.1Ge0.9/LT-Ge layers to increase the degree of relaxation. The total thickness of the epitaxial layer is 270 nm, with the average surface roughness at 0.6 nm. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Ge | en_US |
dc.subject | SiGe | en_US |
dc.subject | UHV/CVD | en_US |
dc.subject | fully stress relaxation | en_US |
dc.title | Effect of Low Temperature Ge Seed Layer and Post Thermal Annealing on Quality of Ge1-xSix (0.05 <= x <= 0.1) Graded Buffer Layers by UHV-CVD | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1007/s13391-014-4016-7 | en_US |
dc.identifier.journal | ELECTRONIC MATERIALS LETTERS | en_US |
dc.citation.volume | 10 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.spage | 759 | en_US |
dc.citation.epage | 762 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | 奈米中心 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.contributor.department | Nano Facility Center | en_US |
dc.identifier.wosnumber | WOS:000339642600012 | - |
dc.citation.woscount | 0 | - |
Appears in Collections: | Articles |