標題: | Numerical simulation and comparison of electrical characteristics between uniaxial strained bulk and SOI FinFETs |
作者: | Li, Yiming 電信工程研究所 Institute of Communications Engineering |
關鍵字: | Strained bulk FinFET;Strained SOI FinFET;Device simulation;Electrical characteristics;Drain current;Drain-induced barrier height lowering;Subthreshold swing |
公開日期: | 1-Dec-2006 |
摘要: | In this paper, electrical characteristics of 25 nm strained fin-typed field effect transistors (FinFETs) with oxide-nitride-stacked-capping layer are numerically studied. The FinFETs are fabricated on two different wafers, one is bulk silicon and the other is silicon-on-insulator (SOI) substrate. A three-dimensional device simulation is performed by solving a set of density-gradient-hydrodynamic equations to study device performance including, such as the drain current characteristics (the I-D-V-G and I-D-V-D curves), the drain-induced barrier height lowering, and the subthreshold swing. Comparison between the strained bulk and SOI FinFETs shows that the strained bulk FinFET is promising for emerging multiple-gate nanodevice era according to the manufacturability point of view. |
URI: | http://dx.doi.org/10.1007/s10825-006-0020-y http://hdl.handle.net/11536/24947 |
ISSN: | 1569-8025 |
DOI: | 10.1007/s10825-006-0020-y |
期刊: | JOURNAL OF COMPUTATIONAL ELECTRONICS |
Volume: | 5 |
Issue: | 4 |
起始頁: | 371 |
結束頁: | 376 |
Appears in Collections: | Articles |