標題: Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling
作者: Fan, Ming-Long
Hu, Vita Pi-Ho
Chen, Yin-Nien
Su, Pin
Chuang, Ching-Te
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-十月-2014
摘要: This paper extensively evaluates the stability and performance of heterochannel 6T/8T SRAM cells integrated in monolithic 3-D scheme with interlayer coupling. Various bitcell layouts with different gate alignments of transistors from distinct layers are investigated. This paper indicates that stacking the NFET tier over the PFET tier results in larger design margins for cell robustness and performance. Furthermore, the partition of 3-D layout design among distinct layers shows profound impacts on the stability, standby leakage, and performance of monolithic 3-D SRAM cells. Compared with the Si-based cells, the use of heterochannel devices increases the improvements of monolithic 3-D design over the 2-D counterparts and emerges as a suitable candidate for future monolithic 3-D IC applications.
URI: http://dx.doi.org/10.1109/TED.2014.2348856
http://hdl.handle.net/11536/25363
ISSN: 0018-9383
DOI: 10.1109/TED.2014.2348856
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 61
Issue: 10
起始頁: 3448
結束頁: 3455
顯示於類別:期刊論文