完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Wang, Chin-Te | en_US |
dc.contributor.author | Kuo, Chien-I | en_US |
dc.contributor.author | Lim, Wee-Chin | en_US |
dc.contributor.author | Hsu, Li-Han | en_US |
dc.contributor.author | Hsu, Heng-Tung | en_US |
dc.contributor.author | Miyamoto, Yasuyuki | en_US |
dc.contributor.author | Chang, Edward Yi | en_US |
dc.contributor.author | Tsai, Szu-Ping | en_US |
dc.contributor.author | Chiu, Yu-Sheng | en_US |
dc.date.accessioned | 2014-12-08T15:37:07Z | - |
dc.date.available | 2014-12-08T15:37:07Z | - |
dc.date.issued | 2010-01-01 | en_US |
dc.identifier.isbn | 978-1-4244-5920-9 | en_US |
dc.identifier.issn | 1092-8669 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/25487 | - |
dc.description.abstract | The fabrication process of an 80 nm In(0.7)Ga(0.3)As MHEMT device with flip-chip packaging on Al(2)O(3) substrate is presented. The flip-chip packaged device exhibited good dc characteristics with high I(DS) = 425 mA/mm and high g(m) = 970 mS/mm at V(DS) = 1.5 V. Besides, the RF performances revealed high gain of 10 dB at 50 GHz and low minimum noise figure (NF(min))below 2 dB at 60 GHz, showing the feasibility of flip-chip packaged In(0.7)Ga(0.3)As MHEMT device for low noise applications at W-band. | en_US |
dc.language.iso | en_US | en_US |
dc.title | An 80 nm In(0.7)Ga(0.3)As MHEMT with Flip-Chip Packaging for W-Band Low Noise Applications | en_US |
dc.type | Article | en_US |
dc.identifier.journal | 2010 22ND INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS (IPRM) | en_US |
dc.citation.volume | en_US | |
dc.citation.issue | en_US | |
dc.citation.spage | en_US | |
dc.citation.epage | en_US | |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
顯示於類別: | 會議論文 |