標題: | Lateral migration of trapped holes in a nitride storage flash memory cell and its qualification methodology |
作者: | Zous, NK Lee, MY Tsai, WJ Kuo, A Huang, LT Lu, TC Liu, CJ Wang, TH Lu, WP Ting, WC Ku, J Lu, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | lateral migration;MXVAND;NBit;nitride storage;NROM;trapped hole |
公開日期: | 1-Sep-2004 |
摘要: | The negative threshold voltage (V-t) shift of a nitride storage flash memory cell in the erase state will result in an increase in leakage current. By utilizing a charge pumping method, we found that trapped hole lateral migration is responsible for this V-t shift. Hole transport in nitride is characterized by monitoring gate induced drain leakage current and using a thermionic emission model. The hole emission induced V-t shift shows a linear correlation with bake time in a semi-logarithm plot and its slope depends on the bake temperature. Based on the result, an accelerated qualification method for the negative V-t drift is proposed. |
URI: | http://dx.doi.org/10.1109/LED. 2004.833824 http://hdl.handle.net/11536/26419 |
ISSN: | 0741-3106 |
DOI: | 10.1109/LED. 2004.833824 |
期刊: | IEEE ELECTRON DEVICE LETTERS |
Volume: | 25 |
Issue: | 9 |
起始頁: | 649 |
結束頁: | 651 |
Appears in Collections: | Articles |
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