標題: | A dual-gate-controlled single-electron transistor using self-aligned polysilicon sidewall spacer gates on silicon-on-insulator nanowire |
作者: | Hu, SF Wu, YC Sung, CL Chang, CY Huang, TY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | nanotechnology;quantum dots (QD);quantum mires;silicon-on-insulator (SOI) technology |
公開日期: | 1-三月-2004 |
摘要: | A dual-gate-controlled single-electron transistor was fabricated by using self-aligned polysilicon sidewall spacer gates on a silicon-on-insulator nanowire. The quantum dot formed by the electric field effect of the dual-gate structure was miniaturized to smaller than the state-of-the-art feature size, through a combination of electron beam lithography, oxidation, and polysilicon sidewall spacer gate formation processes. The device shows typical MOSFET I-V characteristics at room temperature. However, the Coulomb gap and Coulomb oscillations are clearly observed at 4 K. |
URI: | http://dx.doi.org/10.1109/TNANO.2003.820784 http://hdl.handle.net/11536/26986 |
ISSN: | 1536-125X |
DOI: | 10.1109/TNANO.2003.820784 |
期刊: | IEEE TRANSACTIONS ON NANOTECHNOLOGY |
Volume: | 3 |
Issue: | 1 |
起始頁: | 93 |
結束頁: | 97 |
顯示於類別: | 期刊論文 |