標題: | A 2-V 2.3/4.6-GHz dual-band frequency synthesizer in 0.35-mu m digital CMOS process |
作者: | Chen, WZ Chang, JX Hong, YJ Wong, MT Kuo, CL 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | dual band;frequency doubler;frequency synthesizer |
公開日期: | 1-一月-2004 |
摘要: | This brief describes the design of a frequency synthesizer for 2.3/4.6-GHz wireless applications in a 0.35-mum digital CMOS process. This synthesizer provides dual-band output signals by means of frequency doubling techniques. Output frequency of the proposed synthesizer ranges from 1.87-2.3 GHz, and 3.74-4.6 GHz. This chip consumes a total power of 80 mW from a single 2-V supply, including 45 mW for dual-band output buffers. Core size is 2200 mum x 1600 mum. |
URI: | http://dx.doi.org/10.1109/JSSC.2003.820878 http://hdl.handle.net/11536/27191 |
ISSN: | 0018-9200 |
DOI: | 10.1109/JSSC.2003.820878 |
期刊: | IEEE JOURNAL OF SOLID-STATE CIRCUITS |
Volume: | 39 |
Issue: | 1 |
起始頁: | 234 |
結束頁: | 237 |
顯示於類別: | 期刊論文 |