標題: A 36-mW 320-MHz CMOS Continuous-Time Sigma-Delta Modulator with 10-MHz Bandwidth and 12-bit Resolution
作者: Hong, Kuo-Che
Chiueh, Herming
傳播研究所
Institute of Communication Studies
公開日期: 2010
摘要: A wide-bandwidth low-power CT Sigma Delta modulator with 10MHz signal bandwidth is implemented in TSMC 0.18 mu m CMOS process in this paper. To realize such application scenario, the proposed modulator comprises a third-order active-RC loop filter and a 4-bit internal quantizer operating at 320 MHz clock frequency. To reduced clock jitter sensitivity, non-return-to-zero (NRZ) DAC pulse shaping is used. The excess loop delay is set to half the sampling period of the quantizer and the excess loop delay compensation is achieved by the discrete-time derivator structure. The simulation result achieves above 74-dB SNDR (12 ENOB) over a 10-MHz signal band. The power dissipation is 36mW from a 1.8-V supply and the energy per conversion is 235fJ from post-layout simulation. The proposed circuitry can be utilized in low-power medical imaging and modern wireless communications.
URI: http://hdl.handle.net/11536/27209
ISBN: 978-1-4244-7773-9
ISSN: 1548-3746
期刊: 53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS
起始頁: 725
結束頁: 728
Appears in Collections:Conferences Paper