標題: Short-channel poly-Si thin-film transistors with ultrathin channel and self-aligned tungsten-clad source/drain
作者: Zan, HW
Chang, TC
Shih, PS
Peng, DZ
Kuo, PY
Huang, TY
Chang, CY
Liu, PT
電子工程學系及電子研究所
光電工程學系
Department of Electronics Engineering and Institute of Electronics
Department of Photonics
公開日期: 2004
摘要: A short-channel polycrystalline silicon (poly-Si) thin-film transistor (W/L=10 mum/3 mum) with an ultrathin channel (30 nm) and self-aligned tungsten-clad source/drain structure is demonstrated. With WF6 and SiH4 gas flow ratio of 40/12, selectively deposited tungsten film over 100 nm thick can be easily grown on source/drain regions. As a result, the parasitic source/drain resistance is greatly reduced, leading to improvement of device driving ability. Because tungsten deposition can be carried out at a low processing temperature of 300degreesC, the proposed simple structure is compatible with conventional top-gate structure and can be readily applied to low-temperature poly-Si fabrication. (C) 2003 The Electrochemical Society.
URI: http://hdl.handle.net/11536/27266
http://dx.doi.org/10.1149/1.1635093
ISSN: 1099-0062
DOI: 10.1149/1.1635093
期刊: ELECTROCHEMICAL AND SOLID STATE LETTERS
Volume: 7
Issue: 2
起始頁: G31
結束頁: G33
顯示於類別:期刊論文