標題: High-performance poly-Si TFTs fabricated by implant-to-silicide technique
作者: Lin, CP
Mao, YH
Tsui, BY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: implant-to-silicide (ITS);silicide source/drain (S/D);thin-film transistor (TFT)
公開日期: 1-三月-2005
摘要: High-performance poly-Si thin-film transistors (TFTs) with fully silicided source/drain (FSD) and ultrashort shallow extension (SDE) fabricated by implant-to-silicide (ITS) technique are proposed for the first time. Using the FSD structure, the S/D parasitic resistance can be suppressed effectively. Using the ITS technique, an ultrashort and defect-free SDE can also be formed quickly at about 600 degreesC. Therefore, the FSD poly-Si TFTs exhibits better current-voltage characteristics than those of conventional TFTs. It should be noted that the on/off current ratios of FSD poly-Si TFT (W/L = 1/4,mum) is over 3.3 x 10(7), and the field-effective mobility of that device is about 141.6 (cm(2)/Vs). Moreover, the superior short-channel characteristics of FSD poly-Si TFTs are also observed. It is therefore believed that the proposed FSD poly-Si TFT is a very promising TFT device.
URI: http://dx.doi.org/10.1109/LED.2005.843929
http://hdl.handle.net/11536/13957
ISSN: 0741-3106
DOI: 10.1109/LED.2005.843929
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 26
Issue: 3
起始頁: 185
結束頁: 187
顯示於類別:期刊論文


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