Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, Tsan-Wen | en_US |
dc.contributor.author | Yu, Jui-Yuan | en_US |
dc.contributor.author | Yu, Chien-Ying | en_US |
dc.contributor.author | Lee, Chen-Yi | en_US |
dc.date.accessioned | 2014-12-08T15:40:05Z | - |
dc.date.available | 2014-12-08T15:40:05Z | - |
dc.date.issued | 2009-11-01 | en_US |
dc.identifier.issn | 0018-9200 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/JSSC.2009.2028940 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/27376 | - |
dc.description.abstract | This work provides a dual-mode baseband transceiver chipset for wireless body area network (WBAN) system. The modulation schemes include multi-tone code division multiple access (MT-CDMA) and orthogonal frequency division multiplexing (OFDM) to meet multi-user coexistence (up to 8) and high data rate purposes. Based on the analysis of the WBAN operation behavior, several methods including higher data rate, optimal storage determination, and low power implementation techniques are proposed to reduce the transmission energy. To achieve tiny area integration, an embedded phase frequency tunable clock generator and frequency error pre-calibration scheme are provided to extend the frequency mismatch tolerance to 100 ppm (2.5x of state-of-the-art systems). This chipset is manufactured in 90 nm standard CMOS process. Working at supply voltage of 0.5 V, this chipset is able to provide maximum date rate of 4.85 Mbps with modulator power consumption of 5.52 W. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Baseband | en_US |
dc.subject | power domain | en_US |
dc.subject | power gating | en_US |
dc.subject | WBAN | en_US |
dc.subject | voltage scaling | en_US |
dc.title | A 0.5 V 4.85 Mbps Dual-Mode Baseband Transceiver With Extended Frequency Calibration for Biotelemetry Applications | en_US |
dc.type | Article; Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/JSSC.2009.2028940 | en_US |
dc.identifier.journal | IEEE JOURNAL OF SOLID-STATE CIRCUITS | en_US |
dc.citation.volume | 44 | en_US |
dc.citation.issue | 11 | en_US |
dc.citation.spage | 2966 | en_US |
dc.citation.epage | 2976 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000271488900011 | - |
Appears in Collections: | Conferences Paper |
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