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dc.contributor.authorKer, MDen_US
dc.contributor.authorHsu, KCen_US
dc.date.accessioned2014-12-08T15:40:07Z-
dc.date.available2014-12-08T15:40:07Z-
dc.date.issued2003-11-15en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.42.L1366en_US
dc.identifier.urihttp://hdl.handle.net/11536/27393-
dc.description.abstractTurn-on speed is the main concern for on-chip electrostatic discharge (ESD) protection device, especially, in deep submicron complementary metal-oxide semiconductors (CMOS) processes with ultra-thin gate oxide. A novel dummy-gate-blocking silicon-controlled rectifier (SCR) device with substrate-triggered technique is proposed to improve the turn-on speed of SCR device for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide. From the experimental results, the switching voltage, turn-on resistance, and turn-on time of substrate-triggered SCR (STSCR) device with dummy-gate structure have been efficiently improved, as compared with the normal SCR with shallow trench isolation (STI) structure.en_US
dc.language.isoen_USen_US
dc.subjectdummy gateen_US
dc.subjectsilicon controlled rectifier (SCR)en_US
dc.subjectsubstrate-triggered techniqueen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectESD protectionen_US
dc.titleDummy-gate structure to improve turn-on speed of silicon-controlled rectifier (SCR) device for effective electrostatic discharge (ESD) protectionen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.42.L1366en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERSen_US
dc.citation.volume42en_US
dc.citation.issue11Ben_US
dc.citation.spageL1366en_US
dc.citation.epageL1368en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000187509400007-
dc.citation.woscount0-
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