標題: | Modeling and design of the high performance step SOI-LIGBT power devices by partition mid-point method |
作者: | Chang, FL Lin, MJ Lee, GY Chen, YS Liaw, CW Cheng, HC 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | step drift doping profile;linearly graded doping;SOI-LIGBT |
公開日期: | 1-十月-2003 |
摘要: | In this paper, a partition method is proposed to Study the high voltage devices with the step doping profile for the first time. It has been proposed that its breakdown voltage can be approached to that of the linearly graded devices with similar forward voltage drop (V-cc). In addition, by this method, the breakdown voltage can be deduced and its corresponding issue location is also fingered out in the step drift region. Furthermore. in order to reduce the undesirable additional masks, the degraded factor (D) is developed to obtain better performance with the least number of frames. Eventually, a 660 V step analytical results are compared with a 606.6 V MEDICI Simulation and this shows that the partition method is very effective. (C) 2003 Elsevier Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/S0038-1101(03)00143-6 http://hdl.handle.net/11536/27477 |
ISSN: | 0038-1101 |
DOI: | 10.1016/S0038-1101(03)00143-6 |
期刊: | SOLID-STATE ELECTRONICS |
Volume: | 47 |
Issue: | 10 |
起始頁: | 1693 |
結束頁: | 1698 |
顯示於類別: | 期刊論文 |