標題: A Continuous-Time Delta-Sigma Modulator Using Feedback Resistors
作者: Lin, Yung-Chou
Hsieh, Wen-Hung
Hung, Chung-Chih
電信工程研究所
Institute of Communications Engineering
關鍵字: continuous-time;delta-sigma;modulator;Gm-C
公開日期: 2009
摘要: A third-order continuous-time delta-sigma comprised of Active-RC integrator and Gm-C integrator is presented. For the consideration of power, linearity and performance, the first integrator uses active-RC OpAmp and the others use Gm-C. To reduce the clock jitter sensitivity, we choose nonreturn-to-zero (NRZ) pulse shaping as our DAC type. For the realization of NTF zero optimization, We use resistors to reduce power Consumption. The delta-sigma modulator is implemented in standard digital 0.18-mu m CMOS process which achieves a 60-dB SNDR or 10-bits ENOB over a 1-MHz signal bandwidth at an OSR of 50. The power consumption of the continuous-time delta-sigma modulator itself is 13.7 mW from the 1.8-V supply.
URI: http://hdl.handle.net/11536/28031
http://dx.doi.org/10.1109/VDAT.2009.5158140
ISBN: 978-1-4244-2781-9
DOI: 10.1109/VDAT.2009.5158140
期刊: 2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM
起始頁: 243
結束頁: 246
顯示於類別:會議論文


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