標題: | Job order releasing and throughput planning for multi-priority orders in wafer fabs |
作者: | Chung, SH Pearn, WL Lee, AHI Ke, WT 工業工程與管理學系 Department of Industrial Engineering and Management |
公開日期: | 1-Jan-2003 |
摘要: | To meet the production target of multi-level (multiple priority rank) orders in wafer fabs, this paper uses a hierarchical framework based on a mathematical model, and without the assistance of any simulation tool, to build a production scheduling system to plan wafer lot releasing sequence and time. This system first applies capacity loading analysis to set up the batch policy for each level (rank) of orders. Next, the production cycle time of each product level is estimated with considerations of batching and loading factor. The cycle time is then used to derive system control parameters such as the most appropriate level of work in process (WIP) and the number of daily operations on the bottleneck workstation. Lastly, a Constant WIP mechanism is applied to establish a wafer release sequence table and a throughput timetable. The due date designation for each specific order can hence be confirmed. With the comparison with the result of simulation, it shows that under the designed system the performance and planning measures in the master production schedule can be drawn up quickly and accurately, and the system throughput target and due date satisfaction can be achieved. Overall, the proposed production scheduling system is both effective and practicable, and the planning results are supportive for good target planning and production activity control. |
URI: | http://dx.doi.org/10.1080/0020754021000049862 http://hdl.handle.net/11536/28199 |
ISSN: | 0020-7543 |
DOI: | 10.1080/0020754021000049862 |
期刊: | INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH |
Volume: | 41 |
Issue: | 8 |
起始頁: | 1765 |
結束頁: | 1784 |
Appears in Collections: | Articles |
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