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dc.contributor.authorFan, CLen_US
dc.contributor.authorChen, MCen_US
dc.date.accessioned2014-12-08T15:41:56Z-
dc.date.available2014-12-08T15:41:56Z-
dc.date.issued2002-10-01en_US
dc.identifier.issn0013-4651en_US
dc.identifier.urihttp://dx.doi.org/10.1149/1.1504721en_US
dc.identifier.urihttp://hdl.handle.net/11536/28511-
dc.description.abstractThis work investigates the correlation between electrical characteristics and gate-oxide/polysilicon interface morphology for excimer-laser-annealed (ELA) poly-Si thin-film transistors (TFTs). The main feature of ELA poly-Si films is protrusion at grain boundaries that makes the film surface appear very rough. The surface roughness increases with increasing laser energy density and causes degradation of off-current and reliability for the ELA poly-Si TFTs. This degradation of the off-current is attributed to the lower channel resistance due to the increase in crystallinity of the poly-Si layer and the enhancement of localized electric field arising from the protrusions at the grain boundaries. In addition, the increase of localized electric field also degrades device reliability. Passivation of gate oxide/poly-Si channel by NH3-plasma treatment was found to be favorable in improving the performance and reliability of the ELA poly-Si TFTs. (C) 2002 The Electrochemical Society.en_US
dc.language.isoen_USen_US
dc.titleCorrelation between electrical characteristics and Oxide/Polysilicon interface morphology for excimer-laser-annealed poly-Si TFTsen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.1504721en_US
dc.identifier.journalJOURNAL OF THE ELECTROCHEMICAL SOCIETYen_US
dc.citation.volume149en_US
dc.citation.issue10en_US
dc.citation.spageG567en_US
dc.citation.epageG573en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000178030100054-
dc.citation.woscount1-
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