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dc.contributor.authorTseng, CHen_US
dc.contributor.authorChang, TKen_US
dc.contributor.authorChu, FTen_US
dc.contributor.authorShieh, JMen_US
dc.contributor.authorDai, BTen_US
dc.contributor.authorCheng, HCen_US
dc.contributor.authorChin, Aen_US
dc.date.accessioned2014-12-08T15:42:21Z-
dc.date.available2014-12-08T15:42:21Z-
dc.date.issued2002-06-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2002.1004226en_US
dc.identifier.urihttp://hdl.handle.net/11536/28758-
dc.description.abstractBy optimizing the inductively coupled plasma (ICP) oxidation condition, a thin oxide of 10 nm has been grown at 350degreesC to achieve excellent gate oxide integrity of low leakage current < 5x10(-8) A/cm(2) (at 8 MV/cm), high breakdown field of 9.3 MV/cm and low interface trap density of 1.5x10(11)/eV cm(2). The superior performance poly-Si TFTs using such a thin ICP oxide were attained to achieve a high ON current of 110 &mu;A/&mu;m at V-D=1 V and V-G = 5 V and the high electron field effect mobility of 231 cm(2)/V.S.en_US
dc.language.isoen_USen_US
dc.subjectbreakdown fielden_US
dc.subjectgate oxideen_US
dc.subjectinductively coupled plasma (ICP)en_US
dc.subjectleakage currenten_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleInvestigation of inductively coupled plasma gate oxide on low temperature polycrystalline-silicon TFTsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2002.1004226en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume23en_US
dc.citation.issue6en_US
dc.citation.spage333en_US
dc.citation.epage335en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000175844800013-
dc.citation.woscount11-
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