標題: | Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer |
作者: | Tsai, Tzu-I Lin, Horng-Chih Lee, Yao-Jen Chen, King-Sheng Wang, Jeff Hsueh, Fu-Kuo Chao, Tien-Sheng Huang, Tiao-Yuan 電子物理學系 電子工程學系及電子研究所 Department of Electrophysics Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Strained-Si;CESL;Si3N4 capping;Hydrogen-annealed wafer |
公開日期: | 1-十月-2008 |
摘要: | In this study, the effects of Si3N4 layer capping and TEOS buffer layer inserted prior to the Si3N4 deposition on the NMOS device characteristics as well as correlated hot-electron degradations were investigated. The devices were built on two kinds of the substrates, namely, Cz and hydrogen-annealed (Hi) wafers. More importantly, we found that hydrogen species is the primary culprit for aggravated reliabilities in strained devices. By exerting the accelerated stress test, we could study the hot-electron degradation thoroughly in terms of threshold voltage shift (Delta V-TH), transconductance degradation (Delta Gm) and so on. The TEOS buffer layer could effectively block the diffusion of hydrogen species from the Si3N4 capping layer into the channel and the Si/SiO2 interface during the Si3N4 deposition as well as subsequent thermal cycles. (C) 2008 Elsevier Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/j.sse.2008.06.007 http://hdl.handle.net/11536/28854 |
ISSN: | 0038-1101 |
DOI: | 10.1016/j.sse.2008.06.007 |
期刊: | SOLID-STATE ELECTRONICS |
Volume: | 52 |
Issue: | 10 |
起始頁: | 1518 |
結束頁: | 1524 |
顯示於類別: | 會議論文 |