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dc.contributor.authorFan, HBen_US
dc.contributor.authorWu, YLen_US
dc.contributor.authorChang, YWen_US
dc.date.accessioned2014-12-08T15:42:55Z-
dc.date.available2014-12-08T15:42:55Z-
dc.date.issued2002-01-01en_US
dc.identifier.issn0018-9340en_US
dc.identifier.urihttp://dx.doi.org/10.1109/12.980020en_US
dc.identifier.urihttp://hdl.handle.net/11536/29083-
dc.description.abstractIn the paper [5], the authors defined the well-structured symmetric switch block M-N,M-W and showed that M-N,M-W is universal for any pair of positive integers N and W, However, we find that this result is partially correct. Here, we show that, when N greater than or equal to 7, M-N,M-W is not universal for odd Ws (greater than or equal to 3) and it is universal for any even W.en_US
dc.language.isoen_USen_US
dc.subjectfield programmable gate arrayen_US
dc.subjectuniversal switch block designen_US
dc.subjectFPGA routingen_US
dc.titleComment on "Generic universal switch blocks"en_US
dc.typeArticleen_US
dc.identifier.doi10.1109/12.980020en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTERSen_US
dc.citation.volume51en_US
dc.citation.issue1en_US
dc.citation.spage93en_US
dc.citation.epage95en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000173862900008-
dc.citation.woscount5-
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