Novel chip standby current prediction model and ultrathin gate oxide scaling limit

Abstract

In deep sub-micron technology, leakage current of the oxide layer has a severe impact on chip power consumption due to the scaling down of oxide thickness. The inverter circuit model proposed in this paper provides a simple and quick method of predicting chip standby current. This model takes into account both the conventional device-off current and the inversion gate current, as compared to the conventional approach in which the gate leakage current is small and neglected. The temperature dependence study shows that the logarithm of the device-off current is inversely proportional to temperature. From 25 C, the device-off current increases tenfold for a temperature increase of 50 C, while the inversion gate current is almost temperature independent. Hence, a more aggressive oxide scaling rule could be employed in high-performance products operated at higher temperatures under the same device-off current/inversion gate current ratio.