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dc.contributor.authorTsui, BYen_US
dc.contributor.authorWu, MDen_US
dc.contributor.authorGan, TCen_US
dc.date.accessioned2014-12-08T15:43:24Z-
dc.date.available2014-12-08T15:43:24Z-
dc.date.issued2001-10-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.954912en_US
dc.identifier.urihttp://hdl.handle.net/11536/29380-
dc.description.abstractSilicide had been used to reduce the sheet resistance of diffusion region for almost 20 years. However, as the silicided region becomes small, the contact resistance of silicide/silicon interface becomes higher than the resistance of the Si diffusion region such that current may not flow into the silicide layer. The effect of Mi silicide thickness and contact resistivity on the total resistance of the silicided diffusion region was studied by two-dimensional simulation. It is observed that below a threshold length, the resistance of silicided diffusion region is higher than the unsilicided diffusion region if the silicon consumption during silicide formation is taken into consideration. Thinner silicide and lower contact resistivity reduce total resistance and threshold length but the threshold length is still much longer than the typical design rule of poly-Si to poly-Si distance. It is thus recommended to inhibit silicide formation at the common source/drain region at the metal-gate generation.en_US
dc.language.isoen_USen_US
dc.subjectcontact resistanceen_US
dc.subjectsilicideen_US
dc.subjectsimulationen_US
dc.titleImpact of silicide formation on the resistance of common source/drain regionen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.954912en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume22en_US
dc.citation.issue10en_US
dc.citation.spage463en_US
dc.citation.epage465en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000171432400003-
dc.citation.woscount2-
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