標題: | High quality interpoly dielectrics deposited on the nitrided-polysilicon for nonvolatile memory devices |
作者: | Yang, WL Chao, TS Cheng, CM Pan, TM Lei, TF 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | barrier height;charge-to-breakdown;dielectric;electric breakdown field;interpoly;nonvolatile memories;polysilicon |
公開日期: | 1-七月-2001 |
摘要: | High quality interpoly dielectrics have been fabricated by using NH3 and N2O nitridation on polysilicon and deposition of tetra-ethyl-ortho-silitate (TEOS) oxide with N2O annealing. The surface roughness of polysilicon is improved and the value of weak bonds is reduced due to nitrogen incorporation at the interface, which improves the integrity of interpoly dielectrics, The improvements include a higher barrier height, breakdown strength, and charge-to-breakdown, and a lower leakage current and charge trapping rate than counterparts. It is found that this method can simutaneously improve both charge-to-breakdown (up to 20 C/cm(2)) and electric breakdown field (up to 17 MV/cm). |
URI: | http://dx.doi.org/10.1109/16.930643 http://hdl.handle.net/11536/29516 |
ISSN: | 0018-9383 |
DOI: | 10.1109/16.930643 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 48 |
Issue: | 7 |
起始頁: | 1304 |
結束頁: | 1309 |
顯示於類別: | 期刊論文 |