Characterization and reliability of lightly-doped-drain polysilicon thin-film transistors with oxide sidewall spacer formed by one-step selective liquid phase deposition

Abstract

We have proposed and successfully demonstrated a novel process for fabricating a lightly doped drain (LDD) polysilicon thin-film transistor (poly-Si TFT). The oxide sidewall spacer in the new process is formed by a simple one-step selective liquid phase deposition (LPD) at 23 degreesC. In contrast with conventional methods, this new process does not require an additional photolithographic step for defining the non-self-aligned offset gate, or the deposition of an oxide layer and subsequent etch-back to form the: self-aligned sidewall spacer. Devices fabricated by the new process have a lower leakage current and a better ON/OFF current ratio, compared with non-LDD control devices. The new device also shows excellent current saturation characteristics at high bias and better has hot-carrier endurance. Since the apparatus used for LPD oxide deposition is simple and inexpensive, the new process appears to be promising for future high-performance poly-Si TFT fabrication.