標題: Dimensional effects on the reliability of polycrystalline silicon thin-film transistors
作者: Zan, HW
Shih, PS
Chang, TC
Chang, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-八月-2000
摘要: We found that for unpassivated short-channel TFTs, hot carrier stress-induced degradation phenomena are different with various channel geometries. For device with a wide channel width, the threshold voltage is increased while the subthreshold swing is almost unchanged. The stress-induced oxide-trapped charges are responsible for the degradation. For others with narrow channel widths after stress, on the contrary, the subthreshold swing and I-min are increased, the trap density is greatly increased and the trap-enhanced kink effect is also observed. This is due to the generation of stress-induced grain boundary traps near the drain side. Additionally, the stress-induced degradations of passivated TFTs with various geometries are identical. The increased defect density dominates the mechanism since the hot-carrier stress tends to break the passivated SI-H bonds. (C) 2000 Elsevier Science Ltd. All rights reserved.
URI: http://hdl.handle.net/11536/30346
ISSN: 0026-2714
期刊: MICROELECTRONICS RELIABILITY
Volume: 40
Issue: 8-10
起始頁: 1479
結束頁: 1483
顯示於類別:會議論文


文件中的檔案:

  1. 000089532800040.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。