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dc.contributor.authorWu, YHen_US
dc.contributor.authorChin, Aen_US
dc.date.accessioned2014-12-08T15:45:06Z-
dc.date.available2014-12-08T15:45:06Z-
dc.date.issued2000-07-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.847377en_US
dc.identifier.urihttp://hdl.handle.net/11536/30424-
dc.description.abstractWe have used a simple process to fabricate Si0.3Ge0.7/Si p-MOSFET's. The Si0.3Ge0.7 is formed using deposited Ge followed by 950 degrees C rapid thermal annealing and solid phase epitaxy that is process compatible with existing VLSI. Hole mobility of 250 cm(2)/Vs is obtained from Si0.3Ge0.7 p-MOSFET that is similar to two times higher than Si control devices and results in a consequent substantially higher current drive. The 228 Angstrom Si0.3Ge0.7 thermal oxide grown at 1000 degrees C has a high breakdown field of 15 MV/cm, low interface trap density (D-it) of 1.5 x 10(11) eV(-1) cm(-2), and low oxide charge of 7.2 x 10(10) cm(-2). The source-drain junction leakage after implantation and 950 degrees C RTA is also comparable with Si counterpart.en_US
dc.language.isoen_USen_US
dc.subjecthole mobilityen_US
dc.subjectP-MOSFETen_US
dc.subjectreliabilityen_US
dc.subjectSiGeen_US
dc.titleHigh temperature formed SiGeP-MOSFET's with good device characteristicsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.847377en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume21en_US
dc.citation.issue7en_US
dc.citation.spage350en_US
dc.citation.epage352en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000087898300008-
dc.citation.woscount11-
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