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dc.contributor.authorFann, YWen_US
dc.contributor.authorYang, CTen_US
dc.contributor.authorTseng, SSen_US
dc.contributor.authorTsai, CJen_US
dc.date.accessioned2014-12-08T15:45:37Z-
dc.date.available2014-12-08T15:45:37Z-
dc.date.issued2000-03-01en_US
dc.identifier.issn1016-2364en_US
dc.identifier.urihttp://hdl.handle.net/11536/30691-
dc.description.abstractIn this paper we propose a knowledge-based approach to solving loop-scheduling problems. A rule-based system, called IPLS, is developed by combining a repertory grid and an attribute ordering table to construct a knowledge base. IPLS chooses an appropriate scheduling algorithm by inferring some features of loops and assigning parallel loops to multiprocessors to achieve significant speedup. Because more attributes are proposed, the accuracy of selection of an appropriate scheduling method is improved. In addition, the refined IPLS system can automatically adjust the attributes in the knowledge base according to profile information; therefore, IPLS has the capability of feedback learning. The experimental results show that our approach can achieve greater speedup on multiprocessor systems than can others.en_US
dc.language.isoen_USen_US
dc.subjectparallelizing compileren_US
dc.subjectparallel loop schedulingen_US
dc.subjectknowledge-based systemen_US
dc.subjectmultiprocessor systemsen_US
dc.subjectspeedupen_US
dc.titleAn intelligent parallel loop scheduling for parallelizing compilersen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF INFORMATION SCIENCE AND ENGINEERINGen_US
dc.citation.volume16en_US
dc.citation.issue2en_US
dc.citation.spage169en_US
dc.citation.epage200en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000086284200003-
dc.citation.woscount10-
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