標題: | Structured LDPC codes with low error floor based on PEG Tanner graphs |
作者: | Lin, Yi-Kai Chen, Chih-Lung Liao, Yen-Chin Chang, Hsie-Chia 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2008 |
摘要: | Progressive edge-growth (PEG) algorithm was proven to be a simple and effective approach to design good LDPC codes. However, the Tanner graph constructed by PEG algorithm is non-structured which leads the positions of 1's of the corresponding parity check matrix fully random. In this paper, we propose a general method based on PEG algorithm to construct structured Tanner graphs. These hardware-oriented LDPC codes can reduce the VLSI implementation complexity. Similar to PEG method, our CP-PEG approach can be used to construct both regular and irregular Tanner graphs with flexible parameters. For the consideration of encoding complexity and error floor, the modifications of proposed algorithm are discussed. Simulation results show that our codes, in terms of bit error rate (BER) or packet error rate (PER), outperform other PEG-based LDPC codes and are better than the codes in IEEE 802.16e. |
URI: | http://hdl.handle.net/11536/31042 |
ISBN: | 978-1-4244-2078-0 |
ISSN: | 0271-4302 |
期刊: | PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 |
起始頁: | 1846 |
結束頁: | 1849 |
顯示於類別: | 會議論文 |