"Green" micro-architecture and circuit co-design for ternary content addressable memory

Abstract

In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of "green" micro-architecture and circuit co-design. For achieving energy-efficient TCAM architecture, hierarchy search-line scheme and butterfly match-line scheme are proposed. Moreover, the match-tines are also implemented by noise-tolerant XOR-based conditional keeper and don't-care based power gating scheme to reduce not only search time but power consumption. In order to reduce increasing leakage power with advanced technologies, furthermore, the proposed TCAM design employs super cut-off power gating technique and multi-mode data-retention power gating technique to reduce leakage currents without reducing search time and destroying noise margin. An energy-efficient 256x144 TCAM array is implemented in TSMC 0.13um and designed in 65nm Berkeley Predictive Technology Model, respectively. The simulation results show the leakage power reduction is 70.7% and energy metric of TCAM macro is 0.047 fJ/bit/search.