標題: | A generalized prediction method for modified memory-based high throughput VLC decoder design |
作者: | Lee, YS Shieh, BJ Lee, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | decoding throughput;FIFO;H.263;JPEG;MPEG;tree structure;VLC |
公開日期: | 1-六月-1999 |
摘要: | Variable-length code (VLC) is the most popular data-compression technique which has been used in many data-compression standards, such as JPEG, MPEG-2, and H.263, In this paper, we present a new memory-based tree-search algorithm and very large scale integration architecture for VLC decoders which can achieve very high decoding throughput performance. Different coding tables can be implemented by simply changing the contents of the memory without changing the system hardware, The coding table is mapped onto a memory whose space requirement has been minimized by using a new tree data structure and efficient memory-mapping strategy. In addition, we break the recursive dependency of iterative searching operations by predicting method. The proposed algorithm and architecture can predict the searching node and perform parallel operations. As a result, the decoding throughput rate can be enhanced to about three to eight times more than previously announced architecture. The proposed architecture mainly consists of memory modules and simple arithmetic unit. Based on 0.6-mu m single poly triple metal CMOS technology and MPEG-2 VLC table-15, the decoder system achieves average decoding throughput rate of 720 Mbits/s at 3 V and a 100-MHz clock rate. |
URI: | http://dx.doi.org/10.1109/82.769782 http://hdl.handle.net/11536/31318 |
ISSN: | 1057-7130 |
DOI: | 10.1109/82.769782 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING |
Volume: | 46 |
Issue: | 6 |
起始頁: | 742 |
結束頁: | 754 |
顯示於類別: | 期刊論文 |