標題: | New serial architecture for the Berlekamp-Massey algorithm |
作者: | Chang, HC Shung, CB 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Bose-Chaudhuri-Hacquenghem (BCH) |
公開日期: | 1-四月-1999 |
摘要: | We propose a new efficient serial architecture to implement the Berlekamp-Massey algorithm, which is frequently used in BCH and Reed-Solomon decoders, An inversionless Berlekamp-Massey algorithm is adopted which not only eliminates the finite-field inverter but also introduces additional parallelism, We discover a clever scheduling of three finite-field multipliers to implement the algorithm very efficiently, Compared to a previously proposed serial Berlekamp-Massey architecture, our technique significantly reduces the latency. |
URI: | http://dx.doi.org/10.1109/26.764911 http://hdl.handle.net/11536/31410 |
ISSN: | 0090-6778 |
DOI: | 10.1109/26.764911 |
期刊: | IEEE TRANSACTIONS ON COMMUNICATIONS |
Volume: | 47 |
Issue: | 4 |
起始頁: | 481 |
結束頁: | 483 |
顯示於類別: | 會議論文 |