完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tsai, C. Y. | en_US |
dc.contributor.author | Lee, T. H. | en_US |
dc.contributor.author | Cheng, C. H. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.contributor.author | Wang, Hong | en_US |
dc.date.accessioned | 2014-12-08T15:47:44Z | - |
dc.date.available | 2014-12-08T15:47:44Z | - |
dc.date.issued | 2010-11-22 | en_US |
dc.identifier.issn | 0003-6951 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1063/1.3522890 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/31918 | - |
dc.description.abstract | We have fabricated the TaN-[SiO(2)-LaAlO(3)]-ZrON-[LaAlO(3)-SiO(2)]-Si charge-trapping flash device with highly scaled 3.6 nm equivalent-Si(3)N(4)-thickness. This device shows large 4.9 V initial memory window, and good retention of 3.4 V ten-year extrapolated retention window at 85 degrees C, under very fast 100 mu s and low +/- 16 V program/erase. These excellent results were achieved using deep traps formed in ZrON trapping layer by As(+) implantation that was significantly better than those of control device without ion implantation. (C) 2010 American Institute of Physics. [doi:10.1063/1.3522890] | en_US |
dc.language.iso | en_US | en_US |
dc.title | Highly scaled charge-trapping layer of ZrON nonvolatile memory device with good retention | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1063/1.3522890 | en_US |
dc.identifier.journal | APPLIED PHYSICS LETTERS | en_US |
dc.citation.volume | 97 | en_US |
dc.citation.issue | 21 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000284618300050 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |