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dc.contributor.authorChung, Tung-Hsunen_US
dc.contributor.authorChen, Shu-Hanen_US
dc.contributor.authorLiao, Wen-Hsuanen_US
dc.contributor.authorLin, Shih-Yenen_US
dc.date.accessioned2014-12-08T15:47:59Z-
dc.date.available2014-12-08T15:47:59Z-
dc.date.issued2010-11-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2010.2068273en_US
dc.identifier.urihttp://hdl.handle.net/11536/32030-
dc.description.abstractAn in-plane gate transistor fabricated by using the atomic force microscopy (AFM) lithography is investigated in this letter. By performing repeated oxidation and deoxidation procedures by using the AFM for four times, two V-shaped trenches are fabricated on the prepatterned mesas to isolate the electrical terminals of the device. Without exposing the channel region to the atmosphere, the device has exhibited standard transistor current-voltage characteristics in the 0-5 V range at room temperature, which may be advantageous for the future high-speed application of the device.en_US
dc.language.isoen_USen_US
dc.subjectAtomic force microscopy (AFM)en_US
dc.subjectin-plane gate transistorsen_US
dc.titleIn-Plane Gate Transistors Fabricated by Using Atomic Force Microscopy Anode Oxidationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2010.2068273en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume31en_US
dc.citation.issue11en_US
dc.citation.spage1227en_US
dc.citation.epage1229en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000283448300018-
dc.citation.woscount7-
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