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dc.contributor.authorWang, Kuan-Tien_US
dc.contributor.authorLin, Wan-Chyien_US
dc.contributor.authorChao, Tien-Shengen_US
dc.date.accessioned2014-12-08T15:48:13Z-
dc.date.available2014-12-08T15:48:13Z-
dc.date.issued2010-10-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2010.2057404en_US
dc.identifier.urihttp://hdl.handle.net/11536/32138-
dc.description.abstractFor the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower V(g) (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.en_US
dc.language.isoen_USen_US
dc.subjectDTMOSen_US
dc.subjectmodelingen_US
dc.subjectstrainen_US
dc.subjectzero temperature coefficient (ZTC)en_US
dc.titleThe Zero-Temperature-Coefficient Point Modeling of DTMOS in CMOS Integrationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2010.2057404en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume31en_US
dc.citation.issue10en_US
dc.citation.spage1071en_US
dc.citation.epage1073en_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.identifier.wosnumberWOS:000283353900001-
dc.citation.woscount4-
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