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dc.contributor.authorLin, Da-Wenen_US
dc.contributor.authorChen, Chien-Liangen_US
dc.contributor.authorChen, Ming-Jeren_US
dc.contributor.authorWu, Chung-Chengen_US
dc.date.accessioned2014-12-08T15:48:24Z-
dc.date.available2014-12-08T15:48:24Z-
dc.date.issued2010-09-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2010.2056350en_US
dc.identifier.urihttp://hdl.handle.net/11536/32244-
dc.description.abstractThis letter proposes a novel process to modulate the distance, or proximity, between the tip of embedded silicon-germanium (e-SiGe) and the channel region in pMOSFETs. Traditionally, sophisticated etching treatment is adopted in a spacer structure; however, process-induced variation in the e-SiGe proximity may lead to serious variation in pMOSFET performance. In this letter, an extremely close proximity is achieved using self-aligned silicon reflow (SASR) in hydrogen ambient. As opposed to conventional approaches which have e-SiGe proximity determined by spacer width, the tip of e-SiGe with SASR can be positioned flush with the gate edge, as corroborated by both the TEM analyses and TCAD simulation. A significant improvement in pMOSFET performance is also measured.en_US
dc.language.isoen_USen_US
dc.subjectEmbedded silicon-germanium (e-SiGe)en_US
dc.subjectMOSFETen_US
dc.subjectreflowen_US
dc.subjectself-aligneden_US
dc.subjectstrainen_US
dc.titleAn Extreme Surface Proximity Push for Embedded SiGe in pMOSFETs Featuring Self-Aligned Silicon Reflowen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2010.2056350en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume31en_US
dc.citation.issue9en_US
dc.citation.spage924en_US
dc.citation.epage926en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000283185500008-
dc.citation.woscount1-
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