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dc.contributor.authorWu, Hui-Ien_US
dc.contributor.authorHorng, Qi-Yuanen_US
dc.contributor.authorHu, Roberten_US
dc.contributor.authorJou, Christina F.en_US
dc.date.accessioned2014-12-08T15:48:24Z-
dc.date.available2014-12-08T15:48:24Z-
dc.date.issued2010-09-01en_US
dc.identifier.issn1866-6892en_US
dc.identifier.urihttp://dx.doi.org/10.1007/s10762-010-9664-6en_US
dc.identifier.urihttp://hdl.handle.net/11536/32245-
dc.description.abstractThis paper proposes a new methodology for designing and analyzing wideband matched CMOS LNA with R-L-C loading network, where validity of this new approach is supported by the agreement between the simulated input impedance of the LNA and its calculated counterpart. To demonstrate its feasibility, two wideband matched LNA's are designed using TSMC 0.18-mu m RF-CMOS process. One is for 3-8 GHz application and the second one targets at 8-25 GHz frequency range. The measured results of both circuits will then be presented.en_US
dc.language.isoen_USen_US
dc.subjectWidebanden_US
dc.subjectInput matchingen_US
dc.subjectLow noise amplifieren_US
dc.subjectLNAen_US
dc.titleWideband Matched CMOS LNA Design Using R-L-C Loading Networken_US
dc.typeArticleen_US
dc.identifier.doi10.1007/s10762-010-9664-6en_US
dc.identifier.journalJOURNAL OF INFRARED MILLIMETER AND TERAHERTZ WAVESen_US
dc.citation.volume31en_US
dc.citation.issue9en_US
dc.citation.spage1063en_US
dc.citation.epage1074en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000280571800007-
dc.citation.woscount0-
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