標題: Parallelism exploitation in superscalar multiprocessing
作者: Lu, NP
Chung, CP
資訊工程學系
Department of Computer Science
關鍵字: parallel processing;multiprocessing systems systems;superscalar multiprocessing
公開日期: 1-七月-1998
摘要: To exploit more parallelism in programs, superscalar multiprocessor systems, which exploit both fine-grained and coarse-grained parallelism have been the trend in designing high-speed computing systems. Recently, the authors have developed a simulator for evaluating superscalar multiprocessor systems. This simulator models both a superscalar processor that can exploit instruction-level parallelism, and a shared-memory multiprocessor system that can exploit task-level parallelism. This simulator was used to run four applications chosen from the SPLASH-2 benchmark suite, and collected some performance data to investigate the parallelism exploitation capability of the superscalar multiprocessor systems in various configurations. It was observed that the instruction-level and task-level parallelism in programs can be exploited well by a moderate degree of superscalar processing and a high degree of multiprocessing. For example, the speedup of a 32-way multiprocessor with eight-issue processors can be over 200 relative to a single-issue uniprocessor.
URI: http://hdl.handle.net/11536/32537
ISSN: 1350-2387
期刊: IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES
Volume: 145
Issue: 4
起始頁: 255
結束頁: 264
顯示於類別:期刊論文


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