標題: Spacer technique to fabricate pSi TFTs with 50nm nanowire channels
作者: Chang, Chia-Wen
Chen, Szu-Fen
Wu, Shih-Chieh
Lin, Guan-Liang
Lei, Tan-Fu
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2008
摘要: In this work, polycrystalline silicon thin-film transistors (poly-Si TFTs) with 50-nm nanowire (NW) channels fabricated without advanced photolithograph v I v using a sidewall spacer formation technique are proposed for the first time. Because the poly gate electrode is perpendicularly across poly-Si NW channels to form a tri-gate-like structure, the proposed poly-Si NW TFT owns an outstanding gate controllability. In summary, a simple and low-cost scheme is proposed to fabricate high-performance poly-Si NW TFT suitable for future display manufacturing and practical applications.
URI: http://hdl.handle.net/11536/32675
ISSN: 0097-966X
期刊: 2008 SID INTERNATIONAL SYMPOSIUM, DIGEST OF TECHNICAL PAPERS, VOL XXXIX, BOOKS I-III
Volume: 39
起始頁: 1185
結束頁: 1187
顯示於類別:會議論文