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dc.contributor.authorTu, Shih-Weien_US
dc.contributor.authorLiao, Ta-Chuanen_US
dc.contributor.authorLin, Wei-Kaien_US
dc.contributor.authorLiu, Cheng-Chinen_US
dc.contributor.authorTai, Ya-Hsiangen_US
dc.contributor.authorCheng, Huang-Chungen_US
dc.contributor.authorChien, Feng-Tsoen_US
dc.contributor.authorChen, Chii-Wenen_US
dc.contributor.authorChen, Wan-Luen_US
dc.date.accessioned2014-12-08T15:49:12Z-
dc.date.available2014-12-08T15:49:12Z-
dc.date.issued2008en_US
dc.identifier.issn0097-966Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/32697-
dc.description.abstractThe gate-all-around (GAA) fin-like poly-Si TFTs (FinTFTs) with multiple nanowire channels (MNCs) have been fabricated using a simple process to demonstrate high performance electrical characteristics. The fin-like nanowire (NW) channel with high body thickness-to-width ratio (T-Fin/W-Fin), approximately equals to one, was realized only with a sidewall-spacer formation. The unique suspending MNCs were also achieved to build the GAA structure. By the way, the GAA-MNC Fin TFTs showed outstanding three-dimensional gate controllability and excellent electrical characteristics, which revealed a high ON/OFF current ratio (>10(8)), a low threshold voltage, a steep subthreshold swing, a near-free drain-induced barrier lowering and a good reliability. Therefore, such the high-performance GAA-MNC FinTFTs are vet-v suitable for the applications in the system-on-panel (SOP) and three-dimensional (3D) circuits.en_US
dc.language.isoen_USen_US
dc.titleAdvanced gate-all-around fin-like poly-Si TFTs with multiple nanowire channelsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2008 SID INTERNATIONAL SYMPOSIUM, DIGEST OF TECHNICAL PAPERS, VOL XXXIX, BOOKS I-IIIen_US
dc.citation.volume39en_US
dc.citation.spage1270en_US
dc.citation.epage1273en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000258530100318-
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