Characteristics of poly-Si nanowire transistors with multiple-gate configurations

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DC 欄位	值	語言
dc.contributor.author	Hsu, Hsing-Hui	en_US
dc.contributor.author	Lin, Homg-Chih	en_US
dc.contributor.author	Lee, Ko-Hui	en_US
dc.contributor.author	Huang, Jian-Fu	en_US
dc.contributor.author	Huang, Tiao-Yuan	en_US
dc.date.accessioned	2014-12-08T15:04:53Z	-
dc.date.available	2014-12-08T15:04:53Z	-
dc.date.issued	2008	en_US
dc.identifier.isbn	978-1-4244-1614-1	en_US
dc.identifier.uri	http://hdl.handle.net/11536/3408	-
dc.identifier.uri	http://dx.doi.org/10.1109/VTSA.2008.4530818	en_US
dc.language.iso	en_US	en_US
dc.title	Characteristics of poly-Si nanowire transistors with multiple-gate configurations	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/VTSA.2008.4530818	en_US
dc.identifier.journal	2008 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PROGRAM	en_US
dc.citation.spage	101	en_US
dc.citation.epage	102	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000256564900047	-
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