標題: NOVEL ANNEALING SCHEME FOR FABRICATING HIGH-QUALITY TI-SILICIDED SHALLOW N+P JUNCTION BY P+ IMPLANTATION INTO THIN TI FILMS ON SI SUBSTRATE
作者: JUANG, MH
CHENG, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 30-三月-1992
摘要: A TiSi2 silicided shallow n + p junction with a leakage current density of about 3 nA/cm2, a forward ideality factor of 1.00, and a junction depth of about 0.11-mu-m has been fabricated by implanting P+ ions into thin amorphous-Si/Ti bilayer films on silicon substrate and subsequently processed by a rapid thermal annealing (RTA) at 800-degrees-C/60 s with a post-conventional furnace annealing (CFA) at 600-degrees-C/30 m. RTA not only minimizes the diffusion of knock-on Ti into the junction region, but also facilitates the silicidation and damage annihilation. The low-temperature CFA treatment following the high-temperature RTA process greatly increases the diffusion of dopants into the junction region and thus improves the junction characteristics significantly. The increased diffusion of dopants from the silicide layer into the junction region by the post-CFA process is attributed to the crystallization of the titanium silicide.
URI: http://dx.doi.org/10.1063/1.107257
http://hdl.handle.net/11536/3480
ISSN: 0003-6951
DOI: 10.1063/1.107257
期刊: APPLIED PHYSICS LETTERS
Volume: 60
Issue: 13
起始頁: 1579
結束頁: 1581
顯示於類別:期刊論文