A REAL-TIME C-V MEASUREMENT CIRCUIT FOR MOS CAPACITORS UNDER CURRENT STRESSING

標題:	A REAL-TIME C-V MEASUREMENT CIRCUIT FOR MOS CAPACITORS UNDER CURRENT STRESSING
作者:	LEE, CL LEI, TF HO, JH WANG, WT 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	1-Aug-1991
摘要:	A dynamic large signal C-V measurement circuit is presented to measure real time C-V characteristics of a MOS structure under current stressing conditions. The real time information on the generation and filling of traps and surface states can thus be obtained. With this circuit it has been shown that, for an Al-gate MOS structure, charges on traps and interface surface states recover immediately after the stressing is removed.
URI:	http://dx.doi.org/10.1109/19.85352 http://hdl.handle.net/11536/3723
ISSN:	0018-9456
DOI:	10.1109/19.85352
期刊:	IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
Volume:	40
Issue:	4
起始頁:	775
結束頁:	777
Appears in Collections:	Articles

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