標題: 視訊編碼H.264/AVC於DSP平台上之實現
Implementation of Video Coding H.264/AVC on DSP Platform
作者: 游育瑋
王忠炫
電機學院通訊與網路科技產業專班
關鍵字: 動作估計;熵編碼;視訊標準;系統晶片;Motion Estimation;SOC;H.264;MPEG
公開日期: 2008
摘要: 由於系統晶片 (System on a Chip,SOC) 技術的快速進步,所以可將原本極為龐大的系統植入晶片中以達到系統整合的目的,但是在系統整合的過程中將會衍生出系統不相容與計算複雜度過高的問題。所以本論文將針對H.264/AVC演算法移植於德州儀器之DM642硬體不相容的問題與如何降低計算複雜度去進行探討。我們將PC上的H.264/AVC編碼器與解碼器移植到TI DSP平台上去執行。利用德州儀器所提供的整合型開發環境 (Code Composer Studio,CCS) 了解在處理H.264/AVC移植上硬體不相容的問題與如何解決此問題。並且將H.264/AVC中計算複雜度較高的系統方塊演算法 (Motion Estimation,ME),利用之前視訊標準MPEG-1、MPEG-2與H.261使用過的演算法,觀察計算複雜度與PSNR的優劣,期望可以達到在可接受的計算複雜度代價下換取高視訊品質的效能。
Due to the advance of system-on-chip (SOC) technology, we can achieve system integration by porting huge and high complexity systems to single chip. However it also produces system incompatible and complexity increasing through the process of system integration. The thesis aims at the complexity reduction for video multimedia system. We port H.264 encoder and decoder to the TI DSP platform and employ the code composer studio (CCS) to solve the problems of porting. Moreover, we replace the original motion algorithm of H.264 by a low complexity alternative, called the three step algorithm (TSS), which is employed as the motion estimation algorithm of MPEG-1、MPEG-2 and H.261. Verified by the simulation results, the proposed scheme provides a great improvement on PSNR performance while only increases complexity slightly.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009492521
http://hdl.handle.net/11536/37949
顯示於類別:畢業論文


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