藉由改變巨方塊中資料運算的順序以提升去方塊濾波器的效能

Abstract

摘 要 ISO/IEC as MPEG-4 Part 10 Advanced Video Coding(AVC)與ITU-T制定之H.264/AVC是最新的視訊國際壓縮標準。H.264/AVC具有較高的視訊壓縮率以及能提供較佳視訊品質。由於H.264是採用方塊(block)模式去做影像處理，所以也同時造成了影像的失真，當中最明顯的就是方塊雜訊效應(blocking artifact)。為了解決這個問題，在H.264/AVC的視訊標準裡有一個功能方塊稱作去方塊濾波器(de-blocking filter)，根據H.264/AVC解碼器的複雜度模擬結果中，結果顯示去方塊濾波器是解碼器內最複雜的部分，大約佔用了36%的執行時間。由於去方塊濾波器的資料處理過程中有重複存取的現象產生，因此為了有效提升記憶體存取效能及去方塊濾波之執行速度，我們提出一種新的架構給H.264/AVC的去方塊濾波器使用。首先我們提出了一個新的資料運算順序，使得濾波的時間以及記憶體的使用較傳統的設計少。並提出一個新的資料存取方式，讓去方塊濾波器在處理過程中能夠同時存取所需的資料，藉此來減少所需的工作週期。我們使用硬體描述語言(Verilog Hardware Description Language)來設計此架構, 再利用模擬軟體(ModelSim)分別驗證其功能，並在台灣積體電路公司(TSMC)所提供的0.13μm製程library及Synopsys所提供的合成軟體做合成電路，其合成的結果顯示，在時脈速度為100MHz的情況下，所提出的去方塊濾波器架構能夠處理解析度為720P(1280×720 @60fps)的高解析度視訊影像。

ABSTRACT H.264/AVC is a new generation video coding standard and is approved by ITU-T as Recommendation H.264 and by ISO/IEC as MPEG-4 Part 10 Advanced Video Coding. H.264/AVC is to achieve higher compression efficiency and provide the better video quality. Because the H.264 is an adoption block the mode does image processing. However, the most annoying artifact known as the blocking artifact also comes into existence. In order to solve this problem, the de-blocking filter is an important component of H.264/AVC to reduce the block artifacts. In the complexity simulation of H.264/AVC decoder part, the de-blocking filter is the most complexity part, probably has taken 36% execution time. Because of in the de-blocking filter data processing process has the repetition access appearance. In order to improve memory performance and speed up the de-blocking filter, we propose a new architecture for de-blocking filter in H.264/AVC. First we propose a novel filtering order that results in significant saving in both filtering time and local memory usage. And we propose a new data access a method. Let the de-blocking filter can simultaneous access necessity the data in processing process, we can reduce the working cycles. The proposed architecture is synthesized with TSMC 0.13μm technology. The synthesized de-blocking filter architecture could process video in 720P HD (High-definition television, HDTV, 1280×720 pixels/frame, 60 frames/sec video signals) format at 100MHz.