標題: 超薄含氮氧化層創新製程技術應用在p型金氧半場效電晶體之特性研究
New Advanced Process of Ultrathin Oxynitride on the Characteristics of pMOSFET
作者: 葉佳樺
Chia-Hua Yeh
羅正忠
Jen-Chung Lou
電子研究所
關鍵字: 氮氧化層;Oxynitride
公開日期: 2007
摘要: 為了延續墨爾定律,元件尺寸的微縮必須持續下去,但是極薄的二氧化矽介電層將伴隨著極大的直接穿遂漏電流,而這個直接穿遂漏電流將對元件的功率消耗有嚴重的影響。在閘極二氧化矽介電層薄到10奈米以下,將會隨著嚴重的漏電流,為了解決這嚴重的直接穿遂現象,我們將利用高介電係數材料來替換傳統的二氧化矽。我們利用的高介電係數材料在相同的等效二氧化矽厚度下,能擁有較大的實際物理厚度以抵擋直接穿遂的漏電流。    在先前的報告已指出,含氮氧化層擁有許多傳統氧化層所沒有的優點,例如,有好的抵抗硼擴散的能力、能有效的防禦高電場所照成的熱載子破壞、有較高的介電強度等優點。對於深次微米的ULSI的製程來說,含氮氧化層是能有效的去改善傳統氧化層的缺點而成為主流應用。    我們提出了新的方法能在多晶矽和介電層的介面上形成高氮含量的氧化層,更能有效的去抵擋硼的擴散。形成此含氮氧化層有三步驟,首先把晶片浸泡於雙氧水中,形成化學氧化層,接著在低壓的環境下用氨氣去執行氮化,最後通氧氣用來執行再氧化動作。經過以上三各步驟,就可以在介面上形成高氮含量的氧化層,此法製程簡單而且跟目前的製程技術是相容的。    最後,我們會把此含氮氧化層應用在P型電晶體上,再來探討P型電晶體的電性和可靠度,都擁有低的漏電和對於施加高電場應力有好的忍耐度,且有強的抵抗硼擴散能力和抵抗熱載子能力。
According to the scaling rules, aggressive scaling has lead to silicon dioxide (SiO2) gate dielectrics as ultra thin in state-of-the-art CMOS technologies. As a consequence, static leakage current due to direct tunneling through the gate oxide has been increasing at an exponential rate. As technology roadmaps call for sub-10A° gate oxides within the next five years, a variety of alternative high-k materials are being investigated as possible replacements for SiO2. The higher dielectric constants in these materials allow the use of physically thicker films, potentially reducing the tunneling current while maintaining the gate capacitance needed for scaled device operation. Oxynitride(SiON) have been reported to show many advantages over thermal oxide.For example,excellent resistance to penetration of dopant and other impurities such as refractory metal,a higher dielectric strength,and enhanced resistance to damage induced by radiation and high-field stress . As the continuing scaling down of MOS devices has made high-field-induced device degradation a major concern,thin oxynitride seem promising for applications as a replacement for a thermally grown oxide in submicrometer-range ULSI devices. The oxynitrides with high nitrogen content distributed close to the surface are considered to be the best candidates for 65 nm CMOS integration or below. We propose an alternative approach for forming a high-nitrogen ultrathin oxynitride gate dielectric is demonstrated. The oxynitride growth included three process stages-chemical oxide growth, nitridation and subsequent dry oxidation. Meanwhile, chemical oxide as a starting oxide can provide a better controllability in film thickness. Following that, the chemical oxide was nitrided using a furnace in low-pressure NH3 ambient to transfer high-nitrogen oxynitride. The nitrided chemical oxide was then placed in atmospheric O2 ambient to form a robust oxynitride. The process proposed here is simple and fully compatible with current process technology. Finally, by this technique, pMOSFET of oxynitride were fabricated to study electrical characteristics. They demonstrate excellent properties in terms of low leakage current, high endurance in stressing, superior boron diffusion blocking behavior and weak SILC effect, and good performance in HCI effect.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009511549
http://hdl.handle.net/11536/38087
Appears in Collections:Thesis


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