動態調整頻率產生器與能量效率最佳化單位應用在太陽能電源管理系統

Abstract

隨著手持裝置的廣泛應用, 低功率成為電路設計的主要考量之ㄧ; 同時隨著先 進製程的使用, 數位取代傳統類比電路也逐漸成為趨勢。 本論文研究數位形式 的頻率產生器, 提出了一個雙輸出的數位頻率產生器, 每個輸出都可以隨意調 整頻率和相位, 總共有六種頻率倍數可以選擇。 此數位頻率產生器利用了平穩 充電相位合成器來增加相位資訊, 低功率的延遲單位使延遲線消耗較少的功率, 同時利用數位充電控制器來快速分辨頻率和延遲來達到快速鎖定。 本論文也研 究低電壓震盪器, 並利用低電壓震盪器在能量效率最佳化單位。 能量效率最佳 化單位可以依據不同負載的情況來動態調整供應給1V產生器的時脈頻率, 來達 到能量效率的最佳化。 能量效率最佳化單位應用在太陽能電源管理系統, 此系 統接收太陽能源並且輸出500mV、-500mV 以及1V 給運算電路及記憶體電路。這 個系統在白天由太陽能源提供能量， 在黑夜由電池提供能量。所有研究使用UMC 90nm CMOS 技術實現。

The portable device has been widely used, the low power consumption has become the main concern of circuit design; and the deep-submicron process also bring the trend of replacement of analog intensive architectures with more digital ones. This thesis proposed a digital dual output clock generator with dynamic frequency/phase tuning ability. Each output is independent when tuning frequency and phase and total six multiplied factors are available. The proposed clock generator uses smooth charge phase blender to increase the phase information. The low power delay cell saves the power consumption and the digital charge-detecting controller can achieve fast lock. The low voltage oscillators also had been researched and used it in power efficiency optimization unit. The power efficiency optimization unit supplies a variable frequency (33MHz~300MHz) clock to 1V generator according to the loading condition. The unit is applied in the solar cell power management system. The system accepts power from photovoltaic cell and outputs 500mV, -500mV and 1V to computation circuit and memory circuit. In daytime, the power management is supplied by solar energy and the battery is charged. At night, the battery will supply energy to power management system. All research is implemented in UMC 90nm CMOS technology.