標題: | AN INTEGRATED CAD SYSTEM FOR ALGORITHM-SPECIFIC IC DESIGN |
作者: | SHUNG, CB JAIN, R RIMEY, K WANG, E SRIVASTAVA, MB RICHARDS, BC LETTANG, E AZIM, SK THON, L HILFINGER, PN RABAEY, JM BRODERSEN, RW 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-四月-1991 |
摘要: | LAGER is an integrated computer-aided design (CAD) system for algorithm-specific integrated circuit (IC) design, targeted at applications such as speech processing, image processing, telecommunications, and robot control. LAGER provides user interfaces at behavioral, structural, and physical levels and allows easy integration of new CAD tools. LAGER consists of a behavioral mapper and a silicon assembler. The behavioral mapper maps the behavior onto a parameterized structure to produce microcode and parameter values. The silicon assembler then translates the filled-out structural description into a physical layout and with the aid of simulation tools, the user can fine tune the data path by iterating this process. The silicon assembler can also be used without the behavioral mapper for high sample rate applications. A number of algorithm-specific IC's designed with LAGER have been fabricated and tested, and as examples, a robot arm controller chip and a real-time image segmentation chip will be described. |
URI: | http://dx.doi.org/10.1109/43.75628 http://hdl.handle.net/11536/3821 |
ISSN: | 0278-0070 |
DOI: | 10.1109/43.75628 |
期刊: | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
Volume: | 10 |
Issue: | 4 |
起始頁: | 447 |
結束頁: | 463 |
顯示於類別: | 期刊論文 |