具可調變相位注入鎖定之全數位鎖相迴路

Abstract

本論文提出一具有可調變相位注入鎖定之全數位鎖相迴路，利用參考相位注入數位控制震盪器中，具有降低相位雜訊的效果，藉由可調變相位注入量，在不同環境中達到最佳輸出效能。為了增加數位控制震盪器解析度，利用三角積分調變器，將數位控制震盪器的LSB作分數型的控制，來提升數位控制震盪器的解析度。 所提出的電路架構被實現在TSMC 0.13μm 1P6M CMOS製程，經模擬結果顯示時脈抖動為17ps，功率消耗為22mW，輸出頻率為1.25GHZ，晶片面積為874μm×874μm。

This thesis propose an all digital phase-locked loop with programmable phase injection locking mechanics. The phase injection to the digitally controlled oscillator can reduce the phase noise. Using programmable phase injection strength can achieve optimum output performance in different environment. In order to enhance the resolution of digitally controlled oscillator , we use sigma-delta modulator to achieve fractional control on the LSB. This method will enhance resolution of the digitally controlled oscillator. The proposed ADPLL is implemented in TSMC 0.13 um 1P6M RF technology. The simulation results show that the output clock has a peak-to-peak jitter of 17ps, the power dissipation is 22mW, the output frequency is 1.25GHZ