CMOS吉伯特混頻器之閃爍雜訊改進與60GHz覆晶封裝反對稱二極體混頻器

Abstract

本篇論文主要分為兩個主題，分別實現不同的射頻電路。第一，改進用在零中頻或低中頻架構下的CMOS主動式混頻器的閃爍雜訊。第二，在電路裡結合了傳輸線與共平面波導的方式來實現60GHz反對稱二極體混頻器並與覆晶封裝之後的結果做比較。 論文主要以TSMC 0.18μm CMOS製程，以及TSMC 0.13μm CMOS製程來研製主動式混頻器的閃爍雜訊改進架構，在高頻電路設計則是利用WIN 0.15μm PHEMT製程來實現。其中TSMC 0.18μm CMOS設計了使用除四除頻器具有閃爍雜訊改進之雙重降頻混頻器。而使用靜態電流注入與動態電流注入的主動式混頻器及使用除八除頻器具閃爍雜訊改進之雙重降頻混頻器與頻率規劃則是以TSMC 0.13μm CMOS製程實現。最後在60GHz高頻電路部份，60GHz二極體4倍頻次諧波混頻器和結合放大器的60GHz二極體4倍頻次諧波升頻混頻器都以WIN 0.15μm PHEMT製程來實現。

This thesis is divided into two parts. The first part is about flicker noise improvement for RF CMOS active mixers. Flicker noise in the mixer of a zero IF or low IF wireless receiver can compromise overall receiver sensitivity. Improving the flicker noise corner can increase the SNR. We choose a TSMC 0.18um CMOS technology and TSMC 0.13um CMOS technology to implement low flicker noise active mixer. The other part demonstrates 60GHz 4x subharmonic diode mixers. The object of the design is to realize a technique of flip-chip. The advantages of this technique are the elimination of heat effects and the inductance effects due to bond wires. 60GHz CPW 4x subharmonic mixer and 60GHz CPW 4x subharmonic mixer and amplifier for up conversion are designed and implemented by using WIN 0.15μm PHEMT technology process .